Informatik und Informationstechnik Prof. Dr.-Ing. Andre Guntoro

Raum F 01.319

• Montag, 13:30 - 15:00
• Mittwoch, 14:00 - 15:30

Ausbildung

• 08/1996 – 07/2000: Bachelorstudium an der Fakultät für Elektrotechnik, Petra Christian University, Surabaya, Indonesien
• 09/2001 – 02/2003: Master of Science, Vertiefung: Telekommunikation, Fachbereich Elektrotechnik, Fachhochschule Darmstadt
• 10/2002 – 07/2004: Master of Science, Vertiefung: Informations- und Kommunikationstechnik, Fachbereich Elektrotechnik und Informationstechnik, Technische Universität Darmstadt
• 10/2004 – 03/2009: Promotion (Dr.-Ing.) am Institut für Mikroelektronische Systeme, Fachbereich Elektrotechnik und Informationstechnik, Technische Universität Darmstadt
• 04/2009 – 12/2009: Postdoc am Institut für Mikroelektronische Systeme, Technische Universität Darmstadt, Forschungsschwerpunkt: Adaptronik

Berufserfahrung

• 08/1997 – 03/1999: Wissenschaftliche Hilfskraft an der Petra Christian University
• 06/1999 – 07/2001: Hardware- und Softwareentwickler bei der Trikonektindo Dutanusa GmbH
• 10/2004 – 12/2009: Wissenschaftlicher Mitarbeiter am Institut für Mikroelektronische Systeme der Technischen Universität Darmstadt
• 01/2010 – 06/2011: Hardwareentwickler bei Thales Deutschland - Defense Solutions and Services
• 07/2011 – 08/2026: Forschungs- und Entwicklungsingenieur bei der Robert Bosch GmbH in der Gruppe für Hardware/Software Co-Design und Embedded AI

1. Thiang, A. Guntoro, R. Lim. Type of Vehicle Recognition Using Template Matching Method. In Intl. Conf. on Electrical, Electronics, Communication, and Information (CECI), Mar. 2001.
2. Thiang, R. Lim, A. Guntoro. Car recognition using Gabor filter feature extraction. In Asia-Pasific Conference on Circuits and Systems (APCCAS), Dec. 2002.
3. T. Murgan, A.M. Obeid, A. Guntoro, P. Zipf, M. Glesner, U. Heinkel. Design and Implementation of a Multi-Core Architecture for Overhead Processing in Optical Transport Networks. In Intl. Workshop on Reconfigurable Communication-centric SoCs (ReCoSoC), June 2005.
4. A. Guntoro, P. Zipf, O. Soffke, H, Klingbeil, M. Kumm, M. Glesner. Implementation of Realtime and Highspeed Phase Detector on FPGA. In Intl. Workshop on Reconfigurable Computing: Architectures and Applications (ARC), Feb. 2006.
5. T. Murgan, A. Guntoro, H. Hinkelmann, P.B. Bacinschi, M. Glesner. Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling. In Intl. Workshop on Reconfigurable Communication-centric SoCs (ReCoSoC), June 2007.
6. A. Guntoro, M. Glesner. Novel Approach on Lifting-Based DWT and IDWT Processor with Multi-Context Configuration to Support Different Wavelet Filters. In Intl. Conf. Application-specific Systems, Architectures and Processors (ASAP), July 2008.
7. A. Guntoro, H.-P. Keil, M. Glesner. Configurable VLSI Architecture of a General Purpose Lifting-based Wavelet Processor. In Intl. Conf. on Signal Processing and Multimedia Applications (SIGMAP), July 2008.
8. A. Guntoro, M. Glesner. High-Performance FPGA-based Floating-Point Adder with Three Inputs. In Intl. Conf. on Field Programmable Logic and Applications (FPL), Sep. 2008.
9. A. Guntoro, M. Glesner. A Lifting-Based DWT and IDWT Processor with Multi-Context Configuration and Normalization Factor. In Intl. Conf. on Field Programmable Logic and Applications (FPL), Sep. 2008.
10. A. Guntoro, M. Glesner. Configurable VLSI Architecture of a 3-Input Floating-Point Adder. In Intl. Conf. on Signals and Electronic Systems (ICSES), Sep. 2008.
11. A. Guntoro, M. Momeni, H.-P. Keil, M. Glesner. High-Performance Floating-Point VLSI Architecture of a Lifting-Based Wavelet Processor. In Intl. Conf. on Signals and Electronic Systems (ICSES), Sep. 2008.
12. M. Momeni, A. Guntoro, H.-P. Keil, M. Glesner. Influence of Circuit Nonidealities on Switched-Capacitor Resonators. In Intl. Conf. on Signals and Electronic Systems (ICSES), Sep. 2008.
13. A. Guntoro, M. Glesner. Resolving Longitudinal Amplitude and Phase Information of Two Continuous Data Streams for High-Speed and Real-Time Processing. In Proc. of Kleinheubacher Tagung, Sep. 2008.
14. A. Guntoro, M. Glesner. A Lifting-Based DWT and IDWT Processor with Support for Higher Order Wavelet Filters. In Intl. Conf. on Very Large Scale Integration (VLSI-SoC), Oct. 2008.
15. A. Guntoro, M. Glesner. High-Precision VLSI Architecture of Lifting-Based Forward and Inverse Wavelet Transforms. In Intl. Conf. on Design and Architectures for Signal and Image Processing (DASIP), Nov. 2008.
16. A. Guntoro, M. Glesner. A Flexible Floating-Point Wavelet Processor. In Intl. Conf. on Signal-Image Technology \& Internet-Based Systems (SITIS), Nov. 2008.
17. A. Guntoro, M. Glesner. Low-Latency VLSI Architecture of a 3-Input Floating-Point Adder. In Asia-Pasific Conference on Circuits and Systems (APCCAS), Dec. 2008.
18. A. Guntoro, M. Momeni, H.-P. Keil, M. Glesner. High-Performance Floating-Point VLSI Architecture of Lifting-Based Forward and Inverse Wavelet Transforms. In Asia-Pasific Conference on Circuits and Systems (APCCAS), Dec. 2008.
19. H.-P. Keil, M. Momeni, A. Guntoro, A. G. Ortiz, M. Glesner. A Novel Leakage-Estimation Method for Input-Vector Control. In Asia-Pasific Conference on Circuits and Systems (APCCAS), Dec. 2008.
20. M. Momeni, A. Guntoro, H.-P. Keil, M. Glesner. Impact of Circuit Nonidealities on the Implementation of Switched-Capacitor Resonators. In Asia-Pasific Conference on Circuits and Systems (APCCAS), Dec. 2008.
21. A. Guntoro, H.-P. Keil, M. Glesner. High-speed configurable VLSI architecture of a general purpose lifting-based discrete wavelet processor. In Communications in Computer and Information Science 2009.
22. A. Guntoro, M. Glesner. A Flexible Floating-Point Wavelet Transform and Wavelet Packet Processor. In Design, Automation and Test in Europe (DATE), April 2009.
23. A. Guntoro, M. Glesner. A lifting-based discrete wavelet transform and discrete wavelet packet processor with support for higher order wavelet filters. In IFIP Advances in Information and Communication Technology 2010.
24. S. Vogel, C. Schorn, A. Guntoro, G. Ascheid. Efficient Stochastic Inference of Bitwise Deep Neural Networks. In Workshop on Efficient Methods for Deep Neural Networks at Neural Information Processing Systems Conference (EMDNN), Neural Information Processing Systems (NIPS), Nov. 2016.
25. S. Vogel, A. Guntoro, G. Ascheid. Efficient Hardware Acceleration for Approximate Inference of Bitwise Deep Neural Networks towards Deep Neuromorphic Hardware. In Intl. Conf. on Design and Architectures for Signal and Image Processing (DASIP), Sep. 2017.
26. S. Vogel, M. Liang, A. Guntoro, G, Ascheid. Efficient hardware acceleration of CNNs using logarithmic data representation with arbitrary log-base. In International Conference on Computer-Aided Design (ICCAD) 2018.
27. C. Schorn, A. Guntoro, G. Ascheid. Accurate Neuron Resilience Prediction for a Flexible Reliability Management in Neural Network Accelerators. In Design, Automation and Test in Europe (DATE), March 2018.
28. C. Schorn, A. Guntoro, G. Ascheid. Efficient On-Line Error Detection and Mitigation for Deep Neural Network Accelerators. In SAFECOMP 2018.
29. C. Schorn, A. Guntoro, G. Ascheid. An Efficient Bit-Flip Resilience Optimization Method for Deep Neural Networks. In Design, Automation and Test in Europe (DATE) 2019.
30. S. Vogel, J. Springer, A. Guntoro, G. Ascheid. Self-Supervised Quantization of Pre-Trained Neural Networks for Multiplierless Acceleration. In Design, Automation and Test in Europe (DATE) 2019.
31. S. Vogel, R.B. Rajatha, A. Guntoro, K.V. Laerhoven, G. Ascheid. Bit-Shift-Based Accelerator for CNNs with Selectable Accuracy and Throughput. In Euromicro Conference on Digital System Design 2019.
32. S. Vogel, C. Schorn, A. Guntoro, G. Ascheid. Guaranteed Compression Rate for Activations in CNNs using a Frequency Pruning Approach. In Design, Automation and Test in Europe (DATE) 2019.
33. C. Schorn, T. Elsken, S. Vogel, A. Runge, A. Guntoro, G. Ascheid. Automated design of error-resilient and hardware-efficient deep neural networks. In Neural Computing and Applications 2019.
34. M.J. Klaiber, S. Vogel, A. Acosta, R. Korn, L. Ecco, K. Back, A. Guntoro, I. Feldner. An end-to-end HW/SW co-design methodology to design efficient deep neural network systems using virtual models. In ACM International Conference Proceeding Series 2019.
35. K. Guirguis, C. Schorn, A. Guntoro, S. Abdulatif, B. Yang. SELD-TCN: Sound event localization and detection via temporal convolutional networks. In European Association for Signal Processing (EUSIPCO) 2020.
36. A. Guntoro, C. De La Parra, F. Merchant, F. De Dinechin, J.L. Gustafson, M. Langhammer, R. Leupers, S. Nambiar. Next generation arithmetic for edge computing. In Design, Automation and Test in Europe (DATE) 2020.
37. A. Guntoro, C. De la Parra. Paradigm on approximate compute for complex perception-based neural networks. In Design, Automation and Test in Europe (DATE) 2020.
38. C. De la Parra, A. Guntoro, A. Kumar. Full Approximation of Deep Neural Networks through Efficient Optimization. In International Symposium on Circuits and Systems (ISCAS) 2020.
39. C. De la Parra, A. Guntoro, A. Kumar. ProxSim: GPU-based simulation framework for cross-layer approximate DNN optimization. In Design, Automation and Test in Europe (DATE) 2020.
40. C. De la Parra, A. Guntoro, A. Kumar. Improving approximate neural networks for perception tasks through specialized optimization. In Future Generation Computer Systems 2020.
41. T. Soliman, F. Müller, T. Kirchner, T. Hoffmann, H. Ganem, E. Karimov, T. Ali, M. Lederer, C. Sudarshan, T. Kämpfe, A. Guntoro, N. Wehn. Ultra Low Power Flexible Precision FeFET based Analog In-memory Computing. In International Electron Devices Meeting (IEDM) 2020.
42. T. Soliman, R. Olivio, T. Kirchner, C. De la Parra, M. Lederer, T. Kämpfe, A. Guntoro, N. Wehn. Efficient FeFET Crossbar Accelerator for Binary Neural Networks. In Application-specific Systems, Architectures and Processors (ASAP) 2020.
43. T. Soliman, R. Olivo, T. Kirchner, M. Lederer, T. Kampfe, A. Guntoro, N. Wehn. A Ferroelectric FET Based In-memory Architecture for Multi-Precision Neural Networks. In International System on Chip Conference 2020.
44. C. De la Parra, X. Wu, A. Guntoro, A. Kumar. Knowledge Distillation and Gradient Estimation for Active Error Compensation in Approximate Neural Networks. In Design, Automation and Test in Europe (DATE) 2021.
45. C. De la Parra A. Guntoro, A. Kumar. Efficient Accuracy Recovery in Approximate Neural Networks by Systematic Error Modelling. In Asia and South Pacific Design Automation Conference (ASPDAC) 2021.
46. C. De la Parra, A. El-Yamany, T. Soliman, A. Kumary, N. Wehn, A. Guntoro. Exploiting Resiliency for Kernel-wise CNN Approximation enabled by Adaptive Hardware Design. In International Symposium on Circuits and Systems (ISCAS) 2021.
47. T. Soliman, C. De la Parra, A. Guntoro, N. Wehn. Adaptable Approximation Based on Bit Decomposition for Deep Neural Network Accelerators. In International Conference on Artificial Intelligence Circuits and Systems (AICAS) 2021.
48. N. Laleni, T. Soliman, F. Mueller, S. Mojumder, T. Kirchner, M. Lederer, T. Hoffmann, A. Guntoro, N.  Wehn, T. Kaempfe, In-Memory Computing exceeding 10000 TOPS/W using Ferroelectric Field Effect Transistors for EdgeAI Applications. In MikroSystemTechnik Kongress 2021: Mikroelektronik, Mikrosystemtechnik und ihre Anwendungen 2021.
49. C. Sudarshan, T. Soliman, C. De la Parra, C. Weis, L. Ecco, M. Jung, N. Wehn, A. Guntoro. A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. In Asia and South Pacific Design Automation Conference (ASPDAC) 2021.
50. C. De la Parra, T. Soliman, A. Guntoro, A. Kumar, N. Wehn. Increasing Throughput of In-Memory DNN Accelerators by Flexible Layerwise DNN Approximation. In IEEE Micro Journal 2022.
51. C. Sudarshan, T. Soliman, J. Lappas, C. Weis, M.H. Sadi, M. Jung, A. Guntoro, N. Wehn. A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. In IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2022.
52. T. Soliman, N. Laleni, T. Kirchner, F. Müller, A. Shrivastava, T. Kämpfe, A. Guntoro, N. Wehn. FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration. In ACM Transactions on Embedded Computing Systems 2022.
53. T. Soliman, A. Eldebiky, C. De La Parra, A. Guntoro, N. Wehn. Efficient Hardware Approximation for Bit-Decomposition Based Deep Neural Network Accelerators. In International System on Chip Conference 2022.
54. N. Laleni, T. Soliman, C. De La Parra, F, Müller, T. Kirchner, A. Guntoro, T. Kämpfe, N. Wehn. Towards Variability Immune Scalable FeFET-based Macros for IMC DNN Accelerators. In IEEE International Conference on Electronics, Circuits and Systems 2023.
55. M. Beyer, A. Guntoro, H. Blume. Fault-tolerant Radar Signal Processing using Selective Observation Windows and Peak Detection. In European Signal Processing Conference (EUSIPCO) 2022.
56. M. Beyer, J.M. Borrmann, A. Guntoro, H. Blume. Online Quantization Adaptation for Fault-Tolerant Neural Network Inference. In Book Computer Safety, Reliability, and Security, 2023.
57. M. Beyer, S. Gesper, A. Guntoro, G. Paya-Vaya, H. Blume. Exploiting Subword Permutations to Maximize CNN Compute Performance and Efficiency. In Application-specific Systems, Architectures, and Processors (ASAP) 2023.
58. J. Yin, S. Damiano, M. Verhelst, T. van Waterschoot, A. Guntoro. Real-Time Acoustic Perception for Automotive Applications. In Design, Automation and Test in Europe (DATE) 2023.
59. J. Yin, L. Mei, A. Guntoro, M. Verhelst. ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators. In International Conference on Computer Design (ICCD) 2023.
60. S. Damiano, B. Cramer, A. Guntoro, T. van Waterschoot. Synthetic data generation techniques for training deep acoustic siren identification networks. In Frontiers in Signal Processing 2024.
61. S. Damiano, L. Bondi, A. Guntoro, T. van Waterschoot. A framework for the acoustic simulation of passing vehicles using variable length delay lines. In Eurasip Journal on Audio Speech and Music Processing 2024.
62. S. Damiano, L. Bondi, S. Ghaffarzadegan, A. Guntoro, T. van Waterschoot. Can Synthetic Data Boost the Training of Deep Acoustic Vehicle Counting Networks? In IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) 2024.
63. S. Kshirasagar, B. Cramer, A. Guntoro, C. Mayr. Auditory Anomaly Detection using Recurrent Spiking Neural Networks. In International Conference on AI Circuits and Systems (AICAS) 2024.
64. S. Kshirasagar, A. Guntoro, C. Mayr. Impact of Sliding Window Variation and Neuronal Time Constants on Acoustic Anomaly Detection Using Recurrent Spiking Neural Networks in Automotive Environment. In Journal Algorithm 2024.
65. A. Guntoro. Multi-Head Gated Recurrent Units for Automotive Sound Source Localization and Detection: A Systematic Analysis of Hybrid Feature Fusion and Temporal Dynamics. In International Conference on Advances in Signal Processing and Artificial Intelligence (ASPAI) 2026.
66. S. Kshirasagar, A. Guntoro, B. Cramer, C. Mayr. Spiking (C)NNs with Frequency-Spatial Feature Fusion for Automotive Sound Source Localization and Detection. In International Conference on Neuromorphic Systems (ICONS) 2026.
67. S. Kshirasagar, C. Mayr, A. Guntoro. Spike based Multi-Task Loss for Sound Source Localization & Detection. In International Workshop on Acoustic Signal Enhancement (IWAENC) 2026.

• Eingebettete KI
• Rechnerarchitekturen
• Hardwarebeschleuniger (für maschinelles Lernen)
• In-Memory-Computing
• Approximatives Rechnen
• Neuromorphes Rechnen
• Bio-inspiriertes Rechnen
• Analog- und Mixed-Signal
• Signal- und Bildverarbeitung
• Zeitreihen
• Akustik
• Radar
• Funktionale Sicherheit