Description of digital circuits with VHDL, verification of the design by logic simulation, synthesis for realization in an FPGA, design of a test environment, testing on the evaluation board and possible redesign.

• Rapid prototyping of digital circuits
• 7-Segment Display
• Arithmetic-Logic-Unit
• Automata
• Memory control
• CPU
• Digital signal processing by digital FPGA with connected A/D and D/A converter

Lab Room: F01.304a

Lab Director

Prof. Dr.-Ing. Walter Lindermeir